The semiconductor industry continually strives to increase device performance by reducing device dimensions and increasing device packing densities. For a given chip size, increasing the device packing density can be achieved by reducing the lateral distance separating active devices, which can be achieved with a reduction in isolation width. The desire to reduce isolation width, while maintaining the necessary electrical isolation between adjacent active devices, has led to the development of several different dielectric isolation schemes.
One form of dielectric isolation is Recessed Oxide Isolation (ROI). In this approach, a mask overlying a silicon substrate is patterned such that the substrate is exposed in regions where dielectric isolation is to be formed. The exposed silicon regions are then etched, forming trenches in the substrate. During trench formation, unexposed portions of the silicon substrate are protected by an overlying mask. The trench regions are then thermally oxidized to form recessed oxide isolation regions. Thus, in this approach the mask serves both as an etch barrier during trench formation and as an oxidation barrier during trench oxidation. A composite mask of silicon dioxide and silicon nitride has been widely used for this dual purpose. However, a problem with this technique is that regions of silicon underneath edges of the silicon nitride mask are also oxidized due to lateral oxidation. This phenomenon, known as field oxide encroachment, results in the final width of the electrical isolation region being larger than is necessary. Thus, due to field oxide encroachment, a limited increase in device packing density can be achieved with ROI.
The desire to suppress field oxide encroachment has lead to the development of complicated process techniques that seal the sidewall of both the trench and the patterned composite mask in order to prevent or retard lateral oxidation, for example, as described by R. Fang in U.S. Pat. No. 4,398,992. In these techniques a film of silicon nitride or silicon dioxide is frequently used to form the sidewall oxidation seal. However, the additional stress generated by these sealing techniques during trench oxidation creates crystalline defects in the silicon substrate that degrade both device performance and reliability. Additionally, these complicated process techniques are difficult to control and frequently fail to reduce lateral oxidation. Accordingly, a need exists for a ROI process that effectively and reproducibly reduces lateral oxidation and provides stress relief during trench oxidation in order to prevent the generation of substrate defects.